岗位职责:

1. 顶层或块级物理设计。从后DFT网表到gds。完成所有的实施工作并进行验收。

2. 确保按时、合格地交货。

3. 就设计挑战和关键问题与客户进行有效的技术沟通。

4. 根据项目需求优化设计流程。

5. 指导没有经验的新工程师。

任职条件:

1. 应聘者应熟悉亚微米物理设计方法。这包括平面规划、布局和布线、电源分析、时序收敛、物理验证。

2. 熟悉主流布局布线工具，需掌握时序分析和物理验证工具。

3. 熟练使用Perl、TCL或其他脚本语言

4. 具有5年以上相关工作经验的机电工程本科或机电工程硕士。（相关专业亦可）

5. 有Cadence Place和Route工具经验者优先。具有较强的调试和团队合作能力。

Physical Design

JobResponsibilities:

1. Top or block-level physical design. From postDFT netlistto gds. Finish all implementation job and signoff check.

2. Make sure on schedule andqualified delivery.

3. Make effective technicalcommunication with customer on the design challenge, critical issues.

4. Optimize the design flow according to the project requirement.

5. Mentoring the new inexperienced engineer

Job Requirements

1. Have more than 5 years’ experience on digital backend P&R;(not layout)

2. Have tapeout experience on 16nm process at least, better on 7nm/5nm.

3. Be familiar with P&R flow;(placement/CTS/route)

4. Be familiar with one P&R tool;(innovus/ICC2)

5. Preferred to have experience on top level PnR experience; (Highest priority)

6.Preferred to have special critical block PnR experience such as DDR/PCIE/PHY; (High priority)

7.Preferred to have experience on top level STA/Power/PV analysis; (Medium/Low priority)