-Major in electronics engineering/computer science/physics/mathematics.

-Proficient and experienced with the C/C++ programming.

- Proficient with Verilog HDL, familiar with at least one hardware verification language, System Verilog is a strong plus.

-Proficient with one or more scripting languages, such as Shell, Perl and Python is a plus.

1、硕士以上学历，电子、通信、计算机或微电子专业；

2、熟悉C/C++编程；

3、熟悉Verilog/System Verilog；

4、熟悉脚本语言者优先，如Perl或python。